数码管的编码对应的ASCII码用数码管动态显示 顶层文件。
top.v
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: //
// Create Date: 11:51:17 11/14/2010 // Design Name:
// Module Name: top // Project Name: // Target Devices: // Tool versions: // Description: //
// Dependencies: //
// Revision:
// Revision 0.01 - File Created // Additional Comments: //
////////////////////////////////////////////////////////////////////////////////// module
top(clk,rst_n,sm_cs1,sm_cs2,sm_cs3,sm_cs4,sm_db,ps2_clk,ps2_data); input clk,rst_n,ps2_clk,ps2_data; output sm_cs1,sm_cs2,sm_cs3,sm_cs4; output [6:0] sm_db;
wire [7:0] ps2_byte;
// 实例化数码管 digitron digitron (
.clk(clk), .rst_n(rst_n), .sm_cs1(sm_cs1), .sm_cs2(sm_cs2), .sm_cs3(sm_cs3), .sm_cs4(sm_cs4), .sm_db(sm_db), .ps2_byte(ps2_byte)
);
// 实例化键盘 ps2 instance_name (
.clk(clk), .rst_n(rst_n), .ps2_clk(ps2_clk), .ps2_data(ps2_data), .ps2_byte(ps2_byte) ); endmodule
PS2.v
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: //
// Create Date: 16:02:50 11/13/2010 // Design Name:
// Module Name: ps2 // Project Name: // Target Devices: // Tool versions: // Description: //
// Dependencies: //
// Revision:
// Revision 0.01 - File Created // Additional Comments: //
//////////////////////////////////////////////////////////////////////////////////
module ps2(clk,rst_n,ps2_clk,ps2_data,ps2_byte); input clk,rst_n,ps2_clk,ps2_data; output [7:0] ps2_byte;
//捕捉下降沿
reg ps2_clk0,ps2_clk1,ps2_clk2; wire neg_ps2_clk;
always @(posedge clk or negedge rst_n) if(!rst_n)
begin
ps2_clk0 <= 1'b0; ps2_clk1 <= 1'b0; ps2_clk2 <= 1'b0; end else begin
ps2_clk0 <= ps2_clk; ps2_clk1 <= ps2_clk0; ps2_clk2 <= ps2_clk1; end
assign neg_ps2_clk = ps2_clk2 & ~ps2_clk1;
//按照时序进行取数
reg [7:0] ps2_byte_r; //ouput ps2_byte对应的寄存器变量 reg [7:0] temp_data; //数??缓冲变量 reg [3:0] num;
always @(posedge clk or negedge rst_n) if(!rst_n) begin
temp_data <= 8'b0; num <= 1'b0; end
else if(neg_ps2_clk) //当下降沿时，出发事件 begin
case(num)
4'd0: num <= num + 1; //开始状态
4'd1: begin
num <= num + 1;
temp_data[0] <= ps2_data; end 4'd2: begin
num <= num + 1;
temp_data[1] <= ps2_data; end 4'd3: begin
num <= num + 1;
temp_data[2] <= ps2_data; end
4'd4: begin
num <= num + 1;
temp_data[3] <= ps2_data; end 4'd5: begin
num <= num + 1;
temp_data[4] <= ps2_data; end 4'd6: begin
num <= num + 1;
temp_data[5] <= ps2_data; end 4'd7: begin
num <= num + 1;
temp_data[6] <= ps2_data; end 4'd8: begin
num <= num + 1;
temp_data[7] <= ps2_data; end
4'd9: num <= num + 1; 4'd10: num <= 0; default: ; endcase end
//检测是否松手 reg key_f0;
always @(posedge clk or negedge rst_n) if(!rst_n)
key_f0 <= 0;
else if(num == 4'd10) //刚传完一个字节的数据 begin
if(temp_data == 8'hf0) key_f0 <= 1; else begin
if(!key_f0) //??
ps2_byte_r <= temp_data; else //?? key_f0 <= 0; end end
//找出对应的ASCII码 reg [7:0] ps2_asc;
always @(ps2_byte_r) case(ps2_byte_r)
8'h15: ps2_asc <= 8'h51; //Q 8'h1d: ps2_asc <= 8'h57; //W 8'h24: ps2_asc <= 8'h45; //E 8'h2d: ps2_asc <= 8'h52; //R 8'h2c: ps2_asc <= 8'h54; //T 8'h35: ps2_asc <= 8'h59; //Y 8'h3c: ps2_asc <= 8'h55; //U 8'h43: ps2_asc <= 8'h49; //I 8'h44: ps2_asc <= 8'h4f; //O 8'h4d: ps2_asc <= 8'h50; //P 8'h1c: ps2_asc <= 8'h41; //A 8'h1b: ps2_asc <= 8'h53; //S 8'h23: ps2_asc <= 8'h44; //D 8'h2b: ps2_asc <= 8'h46; //F 8'h34: ps2_asc <= 8'h47; //G 8'h33: ps2_asc <= 8'h48; //H 8'h3b: ps2_asc <= 8'h4a; //J 8'h42: ps2_asc <= 8'h4b; //K
8'h4b: ps2_asc <= 8'h4c; //L 8'h1a: ps2_asc <= 8'h5a; //Z 8'h22: ps2_asc <= 8'h58; //X 8'h21: ps2_asc <= 8'h43; //C 8'h2a: ps2_asc <= 8'h56; //V 8'h32: ps2_asc <= 8'h42; //B 8'h31: ps2_asc <= 8'h4e; //N 8'h3a: ps2_asc <= 8'h4d; //M endcase
//将对应的ASCII码送出
assign ps2_byte = ps2_asc; endmodule
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