EDA技术—VHDL版期末试卷(含答案)(3)

WHEN s3 => IF in1='0'THEN next_state<=S0;

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ELSE next_state<=s3; END IF;

END PROCESS;

end case;

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p3:PROCESS(current_state) BEGIN

case current_state is

WHEN s0 => IF in1=‘1’THEN out1<=“1001”; ELSE out1<=\ END IF; WHEN s1 => IF in1='0'THEN out1<=\ ELSE out1<=\ END IF; WHEN s2 => IF in1='1'THEN out1<=\ ELSE out1<=\ END IF; WHEN s3 => IF in1='1'THEN out1<=\ ELSE out1<=\ END IF; end case; END PROCESS; end bhv;

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