A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Proce(7)

A 201.4 GOPS real-time multi-object recognitionprocessor is presented with a three-stage pipelined architecture.Visual perception based multi-object recognition algorithm isapplied to give multiple attentions to multiple objects in the inputimage. For human-like multi-object perception, a neural perceptionengine is proposed with biologically inspired neural networksand fuzzy logic circ

38IEEEJOURNALOFSOLID-STATECIRCUITS,VOL.45,NO.1,JANUARY

2010

Fig.8.Blockdiagram,circuits,andmeasuredwaveformsofobjectdetectionengine.

workforsimilaritymeasureanddecisionmaking,respectively.Incircuitdesign,theODEexploitsanalog-basedmixed-modecircuitstoreduceareaandpoweroverheadofGaussianfunc-tioncircuitsandneuralsynapticmultipliers.Exceptthedigitallyimplementedlearningpart,dataprocessingpartsoftheODEareimplementedbyanalogcircuits.Toexploittheanalogdataprocessing,8-bitintensity,saliency,andlocationvaluesofthetargetandseedpixelareconvertedtoanalogsignalsbyDACs.Afterthat,threeGaussianfunctioncircuitsmeasurethesimi-laritiesbetweenthetwopixelsforthreemetrics.AGaussianfunctioncircuitisrealizedbythecombinationofMOSdiffer-entialpairandminimumfollowercircuitincurrentmodecon- guration.Thedifferentialpaircircuitoutputsthesymmetricdifferentialsignals,eachofwhichhasexponentialnon-linearitycharacteristics.AndtheminimumfollowercircuitgeneratestheGaussian-likeoutputbyfollowingtheminimumbetweenthesymmetricdifferentialsignals.A2-DGaussianfunctioncircuitcanbeimplementedbytwoconsecutiveGaussianfunctioncir-cuitsbyconnectingtheoutputofaGaussianfunctioncircuittothebiascurrentinputtailofthenextGaussianfunctioncircuit.Finally,current-modeneuralsynapticcircuitsmergethethreemeasuredsimilaritieswithmultiplyingtheirweightvalues,andcomparatorcircuitmakethe naldecisionthroughthresholding.WithaHebbianlearning[14],theweightvaluesoftheneuralsynapticcircuits,whichplayaroleinclassi cationcriteria,areupdatedeverycycle.Asaresult,theODEcompletestheROIdetectionfor1objectwithin

7sat200MHzoperatingfrequency.Anditsanalog-basedmixed-modeimplementationreducestheareaandpowerconsumptionby59%and44%,respectively,comparedwiththoseofdigitalimplementation.

Fig.8alsoshowsthemeasurementwaveformsofmixed-modeODE.TheyincludeDACoutputsignal,Gaussianfunctioncir-cuitoutputsignal,and nalclassi cationsignal.Asshownintheenlargedwaveforms,theGaussianoutputsignalvarieswiththesimilarityoftwoanaloginputsignals,andthe nalclassi -cationsignalismadebasedonit.B.SIMDProcessorUnit

TheSPUisdesignedtoaccelerateparallelimageprocessingtasksofthedescriptorgenerationstage.AsshowninFig.9,theSPUconsistofaSPUcontroller,eightSIMDcontrolleddual-issuedverylonginstructionword(VLIW)PEs,128-bit-widedatamemory,and2-DDMA.TheeightPEsperformpixelparallelimageprocessingoperationsuchasGaussian ltering,localmaximumsearch,andhistogramoperation.TheSPUcon-trollercontrolstheoverallprogram owoftheSPU,decodestheinstructionfortheeightPEs,andperformsdatatransferbetweentheeightPEsanddatamemory.ForthedatamemoryoftheeightPEs,a128-bituni edmemoryisusedratherthaneight16-bitmemoriestoreducetheareaandpowerconsumptionby30.4%and36.4%,respectively.ThetwodataalignersbetweenthedatamemoryandeightPEsfacilitatethedatamovementbyrotatingtheuni ed128-bitdatain16-bitunit.The2-DDMAperformsthedatatransferbetweentheexternalmemoryandinternaldatamemoryinparallelwiththePEoperation.Itautomaticallygen-eratestheaddressesfor2-Ddataaccessforthedatatransactionsofvisionapplications.

Thedetailedblockdiagramofeachdual-issuedVLIWPEisalsoshowninFig.9.Itconsistsoftwoindependentdata

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